Memory Layout Engineer – Capgemini Engineering - Capgemini Engineering

Job Location: Bangalore This role is for a Memory Layout Engineer with 3-7 years of experience to design and develop memory blocks for integrated circuits (ICs). You will be responsible for creating efficient memory layouts that meet performance, power, and area constraints. Responsibilities: Design memory layouts for various building blocks including: Bit cell array Row decoder Column decoder Sense amplifiers Input/Output (I/O) blocks Integrate top-level memory blocks Perform physical verifica…

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